This invention relates to power MOSFET switches and in particular to a power MOSFET switch that has the capability of limiting the current that passes through the switch when the load becomes short-circuited.
Power MOSFETs are widely used as switches in a variety of applications, including laptop computers, cellular phones and the like. Many of these products have internal circuit elements that are very sensitive to overcurrent conditions. If one element in the circuit becomes short-circuited, the resulting increase in current through the circuit may damage or destroy remaining elements in the circuit. For example, in a computer Universal Serial Bus (USB) application, there is a risk that if the user short-circuits the USB port the short-circuit will propagate back through the computer and damage other systems within the computer. It is therefore desirable to provide the MOSFET switch with a current-limiting capability that senses an overcurrent condition and closes the switch sufficiently that the current does not reach levels that will damage any of the internal components of the product.
Ideally, a MOSFET switch would have a very low on-resistance and would respond very quickly to an overcurrent condition by limiting the short-circuit current to a predetermined level. Such a switch would be highly efficient as a power supply and would protect upstream systems from short-circuit damage. The response time is particularly important because the longer the circuit is exposed to the overcurrent condition, the greater the likelihood of damage. The systems to be protected must inevitably be overdesigned to some extent to withstand the current pulse that occurs before the current-limiting circuitry is able to operate, and this leads to extra cost and weight. A fast response time in effect minimizes the amount of overdesign necessary.
In many current-detection circuits a xe2x80x9cpilotxe2x80x9d circuit is connected in parallel with the circuit to be monitored, and the current through the pilot circuit is detected. Such a prior art circuit is shown in FIG. 1. The current through power MOSFET 10 (Iout) is mirrored by the current through pilot MOSFET 18. A pilot resistor 26 is connected in the pilot circuit. The gate width of power MOSFET 10 is much larger than the gate width of pilot MOSFET 18, the ratio of the gate widths being defined as xe2x80x9cmxe2x80x9d or as the scaling factor xe2x80x9cSFxe2x80x9d (m=SF). For example, if m=100, the impedance of MOSFET 18 is 100 times the impedance of MOSFET 10, and the current through power MOSFET 10 should be 100 times the size of the current through pilot MOSFET 18. Ideally, this ratio should remain the same regardless of the size of Iout, in which case the current through pilot MOSFET 18 accurately mirrors the current through power MOSFET 10.
A reference current (Iref) is supplied through a reference resistor 30, which is substantially equal to resistor 26. A comparator 32 detects the difference between the voltage drops across pilot resistor 26 and reference resistor 30, and when the voltage drops are equal comparator 32 delivers an output signal.
Iref2 R30 represents wasted energy (R30 representing the size of resistor 30), so it is desirable to increase the size of resistor 30 and reduce the size of Iref. For example, if R30 is doubled, Iref can be reduced by one-half while obtaining the same voltage drop across resistor 30. This requires, however, that the size of resistor 26 also be doubled, since R26≈R30. Increasing the size of resistor 26 (R26) increases the nonlinearity of the circuit, since the ratio of the currents through power MOSFET 10 and pilot MOSFET 18 becomes less constant as resistor 26 becomes larger. The current through the pilot MOSFET 18 thus becomes a less accurate xe2x80x9cmirrorxe2x80x9d of the current through power MOSFET 10.
The circuit shown in FIG. 1 is discussed more fully in U.S. Pat. No. 5,867,014 to Wrathall et al., incorporated herein in its entirety.
This nonlinearity can be overcome by connecting a reference MOSFET 34, equal in size to pilot MOSFET 18, in parallel with resistor 30 and by driving the gate of reference MOSFET 34 in common with the gates of power MOSFET 10 and pilot MOSFET 18, as shown in FIG. 2. This arrangement provides an Iref that is equal to the current that would flow in the pilot circuit if resistor 26 were not present and proportional to the current through the power MOSFET 10. Thus the ratio of the current through power MOSFET 10 to Iref is equal to the scaling factor (SF or m) and remains constant regardless of the size of the current through power MOSFET 10. This allows large resistors to be used for pilot resistor 26 and reference resistor 30 without adversely affecting the linearity of the circuit. The circuit shown in FIG. 2 is explained more fully in U.S. Pat. No. 4,820,968 to Wrathall et al., incorporated herein in its entirety.
Nonetheless, the limitations of transistor fabrication techniques limit the size of the scaling factor (the ratio of the gate widths of power MOSFET 10 and pilot MOSFET 18), and therefore the size of Iref may still be larger than would be desirable to minimize energy losses. As is apparent from FIG. 2, Iref flows at all times, regardless of the state of power MOSFET 10.
A solution to this problem is shown in FIG. 3, which represents the teaching of the above-referenced U.S. Pat. No. 5,867,014. Four reference MOSFETs 62, 64, 66 and 68 are connected in the reference circuitry. Each reference MOSFET is connected in parallel with a different reference resistor 70, 72, 74 and 76. The circuit is similar to the circuit of FIG. 2 except that four parallel MOSFET-resistor combinations similar to the parallel combination of MOSFET 34-resistor 30 are connected in series. Each of MOSFETs 62, 64, 66 and 68 has electrical characteristics substantially similar to those of pilot MOSFET 54. Thus, if the gate width of pilot MOSFET 54 is related to the gate width of power MOSFET 40 by the scaling factor SF=m, the gate width of each of MOSFETs 62, 64, 66 and 68 is also related to gate width of power MOSFET 40 by the factor m. Each of reference resistors 70, 72, 74 and 76 has an impedance equal to the impedance of pilot resistor 58. The factor xe2x80x9cnxe2x80x9d represents the number of reference MOSFETs (i.e., in this case n=4).
It can be shown that, in the embodiment of FIG. 3:
Iout=Irefxc2x7mxc2x7n
Thus, for a given value of Iout, the size of Iref can be reduced by a factor of four in the circuit of FIG. 3 as compared with the circuit of FIG. 2.
The circuit of FIG. 3 functions as a current detector but only when power MOSFET 40 is operating in its linear region.
A prior art circuit for limiting the load current in the event of a short-circuit is shown in FIG. 4. The current through pilot MOSFET 82 is a predetermined percentage of the current through power MOSFET 80. When there is no load current Iout, amplifier 88 biases MOSFET 90 off, and there is no current through the resistor Rset. When Iout increases as a result of a short in the load, the output of amplifier 88 controls MOSFET 90 so that MOSFET 90 gradually conducts more current. As MOSFET 90 begins to conduct, the current replica voltage SET increases and is delivered to the (+) input terminal of the current limit amplifier 86. When the voltage SET exceeds an internal voltage Vref, the output of amplifier 86 reduces the current through power MOSFET 80 and MOSFET 82. Because the feedback loop in this circuit contains two amplifiers, its response time to a short-circuit condition is rather slow. Moreover, the circuit does not limit Iout when the drain voltages of MOSFETS 80 and 82 (i.e., Vout) fall below Vref (about 1.2 V). When this point is reached, further decreases in Vout do not change the output of amplifier 86. Since the gate voltages of MOSFETs 80 and 82 are therefore fixed, the drain to source voltages of MOSFETs 80 and 82 diverge, allowing Iout to increase.
Yet another current-limiting circuit is taught in U.S. Pat. No. 5,541,799, but again it does not limit the transient current sufficiently to protect the components of the circuit.
Thus there exists a real need for a current limiting circuit that has a fast response time and that operates effectively when a short-circuit condition drives the power MOSFET outside of its linear region.
A current-limited switch according to this invention comprises a power MOSFET, a pilot circuit, a reference circuit and a difference amplifier. The pilot circuit is connected in parallel with the power MOSFET, and a pilot MOSFET and a pilot resistor are connected in the pilot circuit. The reference circuit comprises a current source and current mirror circuitry, the current mirror circuitry comprising at least first and second parallel circuits, each parallel circuit comprising a current mirror MOSFET connected in parallel with a resistor. The first and second parallel circuits are connected in series.
The difference amplifier has a first input terminal coupled to a point in the pilot circuit, a second terminal coupled to a point in the reference circuit, and an output terminal coupled to a gate of the power MOSFET.
Importantly, the current-limited switch comprises a current mirror compensation circuit which includes a first bypass switch for forming a short around the first parallel circuit when a voltage at a terminal of the power MOSFET reaches a first level. Since Iout=mxc2x7nxe2x80x83Iref, where n represents the number of parallel circuits, shorting out one of the parallel circuits reduces Iout. This prevents the current through the power MOSFET from increasing linearly as the voltage at one of the terminals of the power MOSFET falls (or increases) as a result of a short-circuit.
The current mirror compensation circuit may comprise a second bypass switch for forming a short around the second parallel circuit when the voltage at the terminal of the power MOSFET reaches a second level. Again this reduces the factor n and prevents Iout from increasing. The current mirror circuitry may contain more than two parallel circuits and the current mirror compensation circuit may contain more than two bypass switches.
The current mirror compensation circuit may also contain a voltage divider circuit for controlling the bypass switches, a first node of the voltage divider circuit being coupled to the first bypass switch and a second node of the voltage-divider circuit being coupled to the second bypass switch.
In a preferred embodiment of this invention, a second MOSFET is used instead of a resistor in each of the parallel circuits. Furthermore, a second pilot MOSFET may be used instead of a resistor in the pilot circuit. A MOSFET takes up less area on the chip than a resistor. Moreover, unlike a resistor a MOSFET can be turned off, thereby allowing power to be conserved when the current-limited switch is turned off.
In another embodiment, a body control circuit is connected to the power MOSFET to prevent a reverse current from flowing through the power MOSFET when it is turned off. This embodiment also enables a plurality of such power MOSFET switches to be connected to a single load.
According to another aspect, this invention includes a method of limiting a current through a power MOSFET. The method comprises connecting a pilot circuit in parallel with the power MOSFET, a pilot MOSFET and a pilot resistor being included in the pilot circuit; forming a reference circuit comprising current mirror circuitry, the current mirror circuitry comprising a series of parallel circuits, each parallel circuit comprising a current mirror MOSFET connected in parallel with a resistor; providing a difference amplifier; coupling a first input terminal of the difference amplifier to a point in the pilot circuit and a second input terminal of the difference amplifier to a point in the reference circuit; coupling an output terminal of the difference amplifier to a gate of the power MOSFET; and shorting out a first one of the parallel circuits when a current through the power MOSFET reaches a first level.
In a preferred method, a second MOSFET is used instead of a resistor in each of the parallel circuits.